Naresh Yarra1, Dr. Suchi Jain2
AN EVALUATION OF DIFFERENT POWER GATING SCHEMES IN THE CONTEXT OF ASYNCHRONOUS CIRCUITS FOR POWER REDUCTION

Naresh Yarra1, Dr. Suchi Jain2
D.SRIKANTH ,J.MURALI MOHAN, K.PAVAN KUMAR
K.PAVAN KUMAR,D.SRIKANTH , J.MURALI MOHAN
J.MURALI MOHAN1, K.PAVAN KUMAR 2,D.SRIKANTH3
G. V. Subba Raju1 , K.Venkata Rao2
JYOTHIRMAYEE B1, DR SUCHI JAIN2
Ilo Frederick .U
Titus M, OwohPh.D, Titus M, OwohPh.D
Chiwetalu U. J., Mbajiorgu C. C., Ozibo B. N.
Ibekwe B.EPh.D , Mgbachi C.APh.D, Eyisi R.O.